Intel released the demo of the first Lakefield chip design
A few years ago, Intel engineer Wilfred Gomes and his fellow workers sat down to decide how the future should look.
The team had just finished its work on Intel’s next-generation high-performance and low-power processes, both of which is going to decrease the size of the company’s chip designs to new extremes.
The chip maker showed off the first completed designs during CES conference for what the company is giving the name of Lakefield.
It is made on the Foveros 3D design that was first highlighted last month, Lakefield is effectively a stacked processor, similar to how chipmakers can now stack memory, that lets Intel break out different PC components into separate “chiplets” that rest on top of one another to create a full system-on-a-chip.
As it is very tiny in size it opens up doors for new technology for lighter laptops and longer-lasting portable devices with special form factors, including foldable phones and tablets that would require the chip to take up much less real estate.
Intel did show some working prototypes in CES.
According to Intel, Lakefield combines a new Sunny Cove core, which is based on the same microarchitecture that will power Intel’s next-generation Core chips, with four low-power Atom cores.
Intel also announced the new Ice Lake architecture during the CES press conference, which is expected to be found in the devices starting later this year, as well as 10nm silicon for the datacenter.
Ice Lake is made for powerful machines, while Lakefield will specialize in lower-power devices with unique hardware constraints.